Logic Minimization Algorithms for VLSI Synthesis by Robert K. Brayton (English)

Description: Logic Minimization Algorithms for VLSI Synthesis by Robert K. Brayton, Gary D. Hachtel, C. McMullen, Alberto L. Sangiovanni-Vincentelli Estimated delivery 3-12 business days Format Hardcover Condition Brand New Description The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. Publisher Description The roots of the project which culminates with the writing of this book can be traced to the work on logic synthesis started in 1979 at the IBM Watson Research Center and at University of California, Berkeley. During the preliminary phases of these projects, the impor tance of logic minimization for the synthesis of area and performance effective circuits clearly emerged. In 1980, Richard Newton stirred our interest by pointing out new heuristic algorithms for two-level logic minimization and the potential for improving upon existing approaches. In the summer of 1981, the authors organized and participated in a seminar on logic manipulation at IBM Research. One of the goals of the seminar was to study the literature on logic minimization and to look at heuristic algorithms from a fundamental and comparative point of view. The fruits of this investigation were surprisingly abundant: it was apparent from an initial implementation of recursive logic minimiza tion (ESPRESSO-I) that, if we merged our new results into a two-level minimization program, an important step forward in automatic logic synthesis could result. ESPRESSO-II was born and an APL implemen tation was created in the summer of 1982. The results of preliminary tests on a fairly large set of industrial examples were good enough to justify the publication of our algorithms. It is hoped that the strength and speed of our minimizer warrant its Italian name, which denotes both express delivery and a specially-brewed black coffee. Details ISBN 0898381649 ISBN-13 9780898381641 Title Logic Minimization Algorithms for VLSI Synthesis Author Robert K. Brayton, Gary D. Hachtel, C. McMullen, Alberto L. Sangiovanni-Vincentelli Format Hardcover Year 1984 Pages 194 Edition 1984th Publisher Kluwer Academic Publishers GE_Item_ID:140490805; About Us Grand Eagle Retail is the ideal place for all your shopping needs! With fast shipping, low prices, friendly service and over 1,000,000 in stock items - you're bound to find what you want, at a price you'll love! Shipping & Delivery Times Shipping is FREE to any address in USA. Please view eBay estimated delivery times at the top of the listing. Deliveries are made by either USPS or Courier. We are unable to deliver faster than stated. International deliveries will take 1-6 weeks. NOTE: We are unable to offer combined shipping for multiple items purchased. This is because our items are shipped from different locations. Returns If you wish to return an item, please consult our Returns Policy as below: Please contact Customer Services and request "Return Authorisation" before you send your item back to us. Unauthorised returns will not be accepted. Returns must be postmarked within 4 business days of authorisation and must be in resellable condition. Returns are shipped at the customer's risk. We cannot take responsibility for items which are lost or damaged in transit. For purchases where a shipping charge was paid, there will be no refund of the original shipping charge. Additional Questions If you have any questions please feel free to Contact Us. Categories Baby Books Electronics Fashion Games Health & Beauty Home, Garden & Pets Movies Music Sports & Outdoors Toys

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